SBIR/STTR Research Award

Ultra-Wideband High Efficiency Power Amplifier for Multifunction RF Systems

Award identifier 891d6cf8b1c13da3c6334c0fc290b2354d0d4248415e58a95bb96b86f9f01eb8Awarding agency Department of Defense · Air Force

Award amount

$149,876

Program and phase

SBIR · Phase I

Award year

2023

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Award details

Awarding agency
Department of Defense
Branch
Air Force
Recipient company
ENGIN-IC INC
Proposal award date
2023-01-24
Contract end date
2023-10-24
UEI
J4LWTAZLK4Q9
Solicitation number
22.2
Topic code
AF222-0020

Research abstract

ENGIN-IC proposes the development of a wideband GaN-on-SiC high efficiency amplifier to achieve the goals of this program.  ENGIN-IC applies a novel, patented circuit topology to achieve simultaneous SWR and high PAE load impedance match across a decade bandwidth or more.  The circuit topology proposed is quite different from that of a distributed amplifier.  The topology proposed enables higher amplifier PAE across a wide bandwidth, and greatly reduces the size of the amplifier in comparison to distributed amplifier circuit topologies.  Such amplifiers can then be sized easily to fit in 3 mm or smaller array spacings.    ENGIN-IC has built more than 10,000 3-W, 33% PAE 2 – 18 GHz GaN amplifiers over the past three years.  Amplifier dimensions are 4.2 mm x 1.7 mm – the parts are very narrow in width, and support T/R element spacings of 3 mm or less.  These amplifiers offer 30-dB small-signal gain and 13-dB or better I/O return loss across 2 to 18 GHz.  This production experience forms a strong foundation for the proposed study and development work for this AFRL high PAE amplifier program.   A two-stage, 2 to 20 GHz GaN amplifier will be demonstrated by ENGIN-IC later this summer, offering 2-W output power and 45% PAE across much of the band.  This will set a new efficiency record for near decade bandwidth solid-state amplifiers in this frequency range.     During Phase 1, ENGIN-IC will prepare a detailed comparison of wideband GaN amplifiers simulated using GaN transistors from four or five different foundries.  These transistors should enable wideband hybrid high PAE feedback amplifiers to achieve power levels > 5 W across 2 to 18 GHz. ENGIN-IC proposes study of other foundry process options discussed in the proposal that will enable higher Q, lower voltage drop passive circuit components.  During Phase 1, ENGIN-IC will prepare a comparison summary of these foundry process options, and their impact on wideband amplifier PAE.   ENGIN-IC will study different assembly processes for the wideband, high PAE GaN amplifier as well.   A proper selection of a) GaN foundry process; b) passive circuit / component processes; and c) assembly processes should enable fabrication of wideband, high PAE amplifiers offering 3-W or higher output power, and > 50% PAE across 2 to 18 GHz.  These amplifiers will have widths (or y-dimensions) of 2 mm or less.   By the end of Phase 1, ENGIN-IC will provide a design simulation of such an amplifier, using the study-recommended foundry and assembly processes.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

16 SBIR/STTR records share this UEI (2015–2024). Reported award amounts total $7,853,675. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense

Agency intelligence

Department of Defense

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