Dynamic Scheduler for Heterogeneous Multi-Tasking

Processing of signals of interest (SOI) in ultra-wideband (UWB) radio receivers can place highly dynamic requirements on compute resources. Modern heterogeneous compute environments like those implemented in open systems may struggle to respond to the dynamic signal environments without significant over allocation of resources. This program will develop a dynamic scheduling system that can reconfigure heterogeneous computing resources including field programmable gate arrays (FPGAs), graphics processing units (GPUs), and central processing units (CPU) with processing algorithms and dispatch processing tasks to those resources quickly enough to respond to highly dynamic environments. During the base period of this Phase I SBIR program Graf Research Corporation will create a configurable model of a heterogeneous compute environment using a discrete event simulator. That model will be used to exercise and instrument developed task scheduling and resource management designs to optimize and prove the feasibility of the approach. During the Phase I option period these algorithms will be implemented in hardware to validate the results of the model and move toward a complete prototype product that will be developed during the Phase II program.