DEVS-Based Re-design of KVM Timestamp Counter Register for Accurate As Is Operational Software Simulation

We propose to develop an approach to Discrete Event System Specification (DEVS)-based re-design of the Linux Kernel-based Virtual Machine (KVM) Timestamp Counter Register (TSCR) for accurate “as is” operational software simulation. To achieve equivalent accurate execution of “as is” software on current lower performance hardware requires that new hardware be modeled and executed in a powerful virtual environment. Thus, we propose to enable the current time source of the KVM to act as an accurate timing source interoperable with the simulation time manager to support execution of “as is” operational software on a KVM. Currently the KVM TSCR controls timing of executed instruction sequences. It emulates the Linux TSCR that is keyed to wall-clock time for virtualization use. We propose that instead of virtualization, the TSCR will be modified to support non-real-time simulation. In contrast to real-time simulation, time in non-real-time simulation does not flow naturally, but requires a simulation coordinator to determine the advance of time as dictated by events/and or steps. The RTSync team, consisting of RTSync and Oak Ridge National Laboratory proposes that the DEVS formalism provides the requisite theoretical and practical basis for development of the proposed architecture. The DEVS formalism will provide the concepts required to correctly place the KVM under external simulation time management. This will require making changes to KVM code to consult the simulation time manager to set the appropriate TSCR value. The simulation time manager will be modeled by the coordinator of the DEVS distributed simulation protocol and we will develop associated DEVS model realizations of the other components. Approved for Public Release |21-MDA-10789 (21 Apr 21)