An Object-Oriented Approach to Rapidly Configurable Digital Twin Technologies to Improve Mission Readiness and Sustainment

Increased system integration, complexity and service life associated with aircraft systems have resulted in higher sustainment and operational costs. Improved physics-based modeling techniques have allowed for better understanding of system performance and failure modes. However, integrated system analysis techniques are typically performed using fleet-based observations and are not maintained on an individual hardware basis once the product is deployed. A sustainable digital twin of a hardware product that monitors hardware sensors and compares to a high-fidelity representation of the product has the potential to leverage the benefits of physics-based modeling in real-time to reduce cost and risk on a platform. However, numerous challenges such as model fidelity, communication limits, data storage, visualization, hardware-based model adaption, and intelligence-based failure detection have limited widespread adoption. Approaches that address these technology gaps are necessary to achieve the significant cost and risk reduction digital twins provide. The primary objective of the Phase I will be the establishment of a robust framework that enables digital twin construction for arbitrary Air Force products. This infrastructure will enable the development of virtual digital twins for initial testing early in the product life-cycle, hardware deployed digital twins during prototyping, and monitoring support through life degradation of a product. The infrastructure developed will be applied to a demonstration problem, highlighting not only the efficacy of the framework in the construction of arbitrary digital twins, but also how critical gaps in present day digital twin construction can be addressed. The successful completion of the demonstration problem will provide justification to expand and enhance the existing infrastructure and apply to more Air Force products in the Phase I option, ensuring a successful transition to hardware applications in the Phase II and III.