SEGA: Single-photon Event Gigasampler Architecture

In this proposed effort, NSL will seek to study the cost-benefit of different features leveraging the developments NSL has achieved for fast digitization, as seen in Figure 1. Based on the results of the study, NSL will design and prototype a fast digitizer design. The main technology driver that SEGA will be conceived from is its system on a chip (SoC) application specific integrated circuits (ASICs). These ASICs have built-in digital signal processing and control interfaces that make extremely precise time of flight (ToF) measurements with single-photon-sensitivity (SPS) possible. The integration of sampling and feature extraction onto a single ASIC eliminates the need for an expensive and power-hungry Field Programmable Gate Array (FPGA), as well as reduce the required printed circuit board (PCB) complexity and size.