SBIR/STTR Research Award

Radiation-Hardened Latch-Up Monitor IC

Award identifier 9b2d4e6d7c223de3d8662fb5776064706cd8a8e40df578456a09bf99677c9755Awarding agency National Aeronautics and Space Administration

Award amount

$123,446

Program and phase

SBIR · Phase I

Award year

2019

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Award details

Awarding agency
National Aeronautics and Space Administration
Branch
Not reported
Recipient company
Silicon Space Technology Corporation
Proposal award date
2019-08-19
Contract end date
2020-02-18
UEI
H77JUZDAR365
Solicitation number
SBIR_19_P1
Topic code
Z8

Research abstract

Designers of electronic circuits that are used in radiation environments are concerned about ICs latching-up due to particle strikes. If a CMOS Integrated Circuit (IC) latches-up, it can often be recovered if it is reset quickly. To protect space electronic circuits from latch-up problems, a radiation-hardened Latch-up Monitor IC is required to determine when any IC on the Printed Circuit Board (PCB) latches-up and to reset that IC.nbsp;nbsp;There is an extremely limited range of solutions available to solve the latch-up problem today. We found only one radiation-tolerant latch-up current limiter device available from 3DPlus that is in a 15mm x 15mm x 12mm cube-like package and has a limited specification. It can monitor only four channels. There are also commercial current-limiting power distribution switches that are themselves susceptible to latching-up. An example of the latter is the Micrel MIC20XX that has been used in low-cost CubeSats.nbsp;VORAGO Technologies propose to develop a radiation-hardened latch-up monitor IC. VORAGO Technologies has developed Intellectual Property (IP) blocks for an 8-channel analog-to-digital converter and a SPI interface that can be used as a base to design a radiation-hardened latch-up monitor IC. The device will be hardened using VORAGOrsquo;s HARDSILreg; technology.nbsp;We propose to implement this device in a 48 pin QFP package and will have the following characteristicsA single chip solution that can detect latch-up in up to eight separate ICsProgrammable trigger levels can be set for each of the ICs that are to be protected from latch-upEight independent alert outputs that can be connected to the RESET inputs of the monitored ICsSmall package footprintLow power consumptionUnder-voltage and over-voltage protection on-chipIntegrated temperature sensor with programmable automatic IC shutdown for over-temperature and over-temperature outputnbsp;

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Research funding history

33 SBIR/STTR records share this UEI (2005–2020). Reported award amounts total $18,593,887. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration

Agency intelligence

National Aeronautics and Space Administration

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