SBIR/STTR Research Award

Low-Energy Charged-Particle Detection via an Avalanche Silicon Detector coupled to an Amorphous Silicon Active Layer

Award identifier 6fde0cac0c6ad3f2136acfbc059de0d8fa689622ebdb70804a4e80da96e6b38dAwarding agency National Aeronautics and Space Administration

Award amount

$149,976

Program and phase

SBIR · Phase I

Award year

2025

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Award details

Awarding agency
National Aeronautics and Space Administration
Branch
Not reported
Recipient company
AMPHIONIC LLC
Proposal award date
2025-09-24
Contract end date
2026-03-27
UEI
QY89W6JYP8Z5
Solicitation number
SBIR 2025-I
Topic code
S14

Research abstract

This SBIR Phase I project will develop a solid-state sensor with on-chip amplification to deliver low-energy (< 10 keV/e-) particle-detection with similar sensitivity and timing performance as existing vacuum-tube multiplication instruments, but do so at low-bias, low-cost, and in a compact, ruggedized package. The work will complete the prototype development of a silicon-based detector scheme for electrons, protons, and heavy ions with a thin-film (4 – 1000 nm) amorphous silicon front active layer and an integrated silicon avalanche layer for on-chip amplification. The amorphous silicon creates charge-pairs for even the lowest of energies, and the p+/n silicon detector produces multiplication gain at low voltage (< 100 V). Compared with channel electron multipliers or microchannel plates that operate at ~1 kV, this not only reduces the power requirements, but it eliminates the arcing risks that can accompany compact instrument and spacecraft designs. The detector: (a) eliminates the need for the ultra-high vacuum required for the vacuum tube technologies, (b) tolerates dust via its solid-state design, and (c) can deliver charged-particle flux measurements with CMOS integration. The Phase I work will establish the simplest design that allows low-energy particle detection by evaluating: (a) thinned silicon avalanche diodes operating at ~50 V, (b) amorphous silicon thin-film diodes operating at 0 V, and (c) a combined device that marries the amorphous silicon sensing layer with the multiplying silicon back layer.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

16 SBIR/STTR records share this UEI (2018–2025). Reported award amounts total $6,176,314. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: National Aeronautics and Space Administration, Department of Defense, Department of Energy

Agency intelligence

National Aeronautics and Space Administration

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