Highly Integrated EFI Chip Assembly for Reliable Use after Multi/Pyro-Shock Events

In the Phase I, Tanner developed and demonstrated structural simulations and static loading tests that improved shock survivability of this highly integrated monolithic EFI chip design. Even under shock excitation spanning the resonant frequencies of the EFI, the stress observed at the copper/FR4 interface was a factor of 6 below the failure point of the materials. With the simulation and empirical data provided, it is clear that the Tanner EFI assembly is robust against shock well outside the measured high amplitude frequency bands, and that peak shock stress is well below the design criteria. Accordingly, the Phase II will be focusing on designing, fabricating, and shock testing the EFI chip on a TO-5 style header for high G-force testing in laboratory-based relevant environments.The physical survivability testing of Tanners EFI chip will also include preliminary pulse Doppler velocimetry (PDV) and Neyer threshold tests before and after the environmental shock tests to truly validate reliability.