SBIR/STTR Research Award

Reconfigurable Memory or Central Processing Unit (CPU) Instruction Architecture

Award identifier 2985412f0d8c16bf05361aac8a18fc0383c578f20970f0044ce1d32cd71a4a8eAwarding agency Department of Defense · Missile Defense Agency

Award amount

$945,984

Program and phase

SBIR · Phase II

Award year

2016

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Award details

Awarding agency
Department of Defense
Branch
Missile Defense Agency
Recipient company
BLUERISC INC
Proposal award date
2016-09-12
Contract end date
2018-09-11
UEI
LVWLKDJURJL1
Solicitation number
2014.2
Topic code
MDA14-006

Research abstract

The proposed solution automatically co-creates a per-device-unique, configurable secure processor, as well as associated enabling software build environment, enabling unique execution environments, instruction set, and protected memory interfaces. The unique execution environments and protected memory interfaces provide foundational resilience against software, black box, physical, as well as side-channel attacks based on power analysis and fault injection.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

60 SBIR/STTR records share this UEI (2003–2025). Reported award amounts total $29,565,062. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense, Department of Homeland Security, National Science Foundation, Department of Energy

Agency intelligence

Department of Defense

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