SBIR/STTR Research Award

Radiation Hardened Cache Memory

Award identifier 318e31be27bdad2ea43a2f0378d767f9bda11b88500898e921258c239415a0b2Awarding agency Department of Defense · Air Force

Award amount

$150,000

Program and phase

SBIR · Phase I

Award year

2014

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Award details

Awarding agency
Department of Defense
Branch
Air Force
Recipient company
SILICON TECHNOLOGIES, INC.
Proposal award date
2014-06-20
Contract end date
2015-03-10
UEI
SPL4KDQD5L49
Solicitation number
2014.1
Topic code
AF141-096

Research abstract

ABSTRACT: Cache memory is normally built with Static Random-Access Memories (SRAM ) and are necessary for many applications, including sensors, hardware based radio station, wireless systems, instrumentation, video, and power. These applications are often used in harsh environments including the nuclear, space, and military markets. These radiation environments magnify the difficulty of designing complex SRAMs due to the fact that ionizing radiation and even a single ionizing particle can generate charge in the semiconductor circuit. The radiation can drastically alter the performance of the SRAM. For example, the effects of ionizing radiation on MOS transistors can cause SRAM cells to switch states. In addition, it can also cause shifts in the threshold voltage, changes in the gain and a marked increase in the leakage currents which significantly affect the periphery circuits. Silicon Technologies, Inc. propose to design and commercialize a high-density, high-performance, Rad Hard Cache RAM technology to serve space markets. We will review existing Cache RAM literature, evaluate findings, pick a process and technology to incorporate. Circuit design, layout and simulations will be included for a representative 64 MB SRAM with appropriate peripheral circuits. BENEFIT: The objective is to create a radiation hardened by design or by process 64MB Cache RAM circuit developed in a Trusted process and available to the Air Force and other DOD departments that require Cache RAM either as a standalone chip or as a IP block to be included in their Systems on a Chip. The Air Force will be able to reduce its NRE costs significantly on future SOC programs that require large SRAM solutions.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

15 SBIR/STTR records share this UEI (2011–2022). Reported award amounts total $5,942,157. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration

Agency intelligence

Department of Defense

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