Precise fabrication of photonic integrated systems using low cost nanoimprint process

In this STTR proposal, we propose to develop a cost-effective and high-fidelity nanoimprint process for the fabrication of integrated photonics devices. VLSI photonics applications require a hig-level of control on device-to-device uniformity. Nanoimprint lithography (NIL) holds promise to overcome the current technological challenges in lithography while being cost effective at the same time. One of the key features of NIL is its ability to preserve and directly translate the lithography patterns from the mold, which should enable highly improved device-to-device uniformity within a die and between die-to-die on a wafer. In this proposal, we will demonstrate the feasibility of using NIL for photonics applications, especially for VLSI integrated photonics structures.We will develop a robust fabrication process that uses NIL to fabricate photonics structures. We will also demonstrate the feasibility of CMOS compatible and passive post fabrication tuning process based on NIL to tune the optical properties of the photonic structures. It will be shown in the course of this proposal that devices fabricated using NIL suffer from lower chip-to-chip variations than those fabricated using e-beam lithography while maintaining the same quality. This effort will also prove a first step for extending the application of NIL in opto-electronics and IC fabrication.