Real Time Adaptable ROIC for improved Power and Performance Optimization in Imager Systems

Remote fielding of Low Light, Near IR and Short Wave IR (N/SW-IR) focal plane arrays (FPAs) requires Readout Integrated Circuits (ROICs) that may dynamically adapt their performance parameters to meet the needs of the situation at the lowest possible power consumption. Pacific Microchip Corp. proposes to design a ROIC capable to accommodate up to 2048 x 2048 pixel, 5 to 25m pitch FPAs with charge and voltage domain P/N as well as N/P detectors. The proposed ROIC will include a number of dynamically adaptable parameters and features: sampling and frame rate, binning and windowing at pixel level, anti-blooming, bi-directional skimming, dynamic range that will permit the imaging system to self-adjust in order to meet the specific operational needs with the lowest possible level of power consumption. A novel power efficient data serializer will be implemented to simplify data interfacing. A unique ROIC topology will permit combining four focal planes to build a 16M pixel imager panel. During Phase I, a simulation model, the preliminary ROIC"s design and in silico proof of the concept will be provided. Phase II will result in the ROIC"s prototype ready for production on 300mm CMOS wafers and its commercialization in Phase III.