SBIR/STTR Research Award
Trusted Circuits Platform with Trusted Assertion Monitors
Award amount
$100,000Program and phase
SBIR · Phase IAward year
2011Award details
- Awarding agency
- Department of Defense
- Branch
- Army
- Recipient company
- LUNA INNOVATIONS INCORPORATED
- Proposal award date
- 2011-02-15
- Contract end date
- Not reported
- UEI
- SJHFCDGKJJC5
- Solicitation number
- 2010.2
- Topic code
- OSD10-A07
Research abstract
In the modern process of integrated circuit (IC) development, the actual design and fabrication of an IC typically is distributed between a number of different companies and/ or individuals. This requires a degree of trust between the designers and the fabricators. Ultimately, the original designer wants to be able to assure that the final device performs only those functions for which it was designed and no others. As an expert in the area of IC Trust, Luna has developed an innovative in-circuit system to allow a designer to establish a level of Trust in integrated circuits. The designer will have the ability to create a custom set of hardwares checkers for their design. During this SBIR program, Luna will leverage this system to improve security monitoring and integration with existing technology.
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
- Rugged Miniature SWDM Mux and Demux for Military Aircraft
- Advanced Distributed Fiber Optic Sensing (DFOS) for Naval Safety
- Distributed Linear and Angular Acceleration Measurement
- Terahertz Imaging for Detection of Corrosion and Defects Under Hull Coatings
- Multi-Modal SHM of Inflatable Habitats via Embedded Fiber Optics Sensing
Awards with the same topic code
Verified by an exact topic code match. This is not a text-similarity match.
- Incorporation of trust into integrated circuit (IC) and field programmable gate array (FPGA) design
- Incorporation of trust into integrated circuit (IC) and field programmable gate array (FPGA) design
- Incorporation of trust into integrated circuit (IC) and field programmable gate array (FPGA) design
Research funding history
994 SBIR/STTR records share this UEI (1991–2026). Reported award amounts total $336,438,763. Reported amounts are not federal obligations.
Phases: Phase I, Phase II, Phase II – Direct to Phase II
Agencies: Department of Defense, National Aeronautics and Space Administration, Department of Energy, Department of Health and Human Services, National Science Foundation, Environmental Protection Agency