SBIR/STTR Research Award

Rapid Radiation Hardened Prototyping of Obsolescent Military Satellite Microelectronics

Award identifier 903658b82e0ec81cae21efed822098a0e2fe413e5a8d23391fce2967e5576c94Awarding agency Department of Defense · Air Force

Award amount

$99,997

Program and phase

SBIR · Phase I

Award year

2010

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Award details

Awarding agency
Department of Defense
Branch
Air Force
Recipient company
Katsman, Vladimir
Proposal award date
2010-03-12
Contract end date
2011-02-11
UEI
WWU3HNAKK629
Solicitation number
2009.3
Topic code
AF093-081

Research abstract

Innovative methodologies for rapid design, fabrication, characterization, and qualification of radiation hardened (RH) space microelectronics are required to minimize disruption of satellite programs by obsolete parts. The replacement parts must be pin-to-pin and functionally compatible with the obsolete components. Full-custom components satisfy those requirements, but must be individually qualified which drastically increases cost, development time, and requires experienced engineering resources. To address the outlined requirements, we propose to develop a novel methodology for rapid replacement of obsolete components based on a pre-qualified RH library that includes 1.8V CMOS standard logic cells and functional blocks, as well as unique self-adaptable high-voltage IOs and efficient signal voltage level converters. All components utilize proprietary annular field-effect transistors designed in a commercial technology. This combination provides a universal interface to CMOS circuits with supply voltages from 1.8V to 5V while supporting data rates up to 1Gb/s within the temperature range of -40ºC to +125ºC and delivering a complete elimination of latch-up conditions and TID tolerance in excess of 2MRad. A possibility of the metal-programmable gate array design approach based on the proposed library will be investigated. A test circuit of medium complexity will be synthesized to demonstrate the advantages of the proposed methodology. BENEFIT: A fully qualified RH library operating at the wide temperature range with self-adaptable high-voltage IOs proved in fabrication of test chips will allow for a rapid replacement of obsolete components in space-oriented and ground-based electronic equipment. The design period of replacement parts can be reduced to several weeks and even days depending on the required chip complexity, while the time-consuming qualification procedures will be also replaced by simple functionality tests. The gate array design approach may further speed-up the development process due to the utilization of pre-fabricated front-end-of-line structures. The developed techniques will also significantly speed-up the development of new components for both military and commercial space applications.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

36 SBIR/STTR records share this UEI (2003–2022). Reported award amounts total $11,404,811. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: National Aeronautics and Space Administration, Department of Defense, Department of Energy

Agency intelligence

Department of Defense

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