Novel Mitigation Techniques for Reconfigurable Computers for Space Based Applications

SEAKR Engineering’s Application Independent Processor (AIP) standard product integrates FPGAs, GPPs and malleable interface support into a flexible onboard processor designed to support many spacecraft applications. The AIP architecture reduces risk, costs, and schedule for satellite missions by providing a reconfigurable space-based platform and variations of the system are slated to be deployed in a variety of missions including communications waveform processing, real-time image processing in the ARTEMIS sensor on TacSat-3, and is being baselined for the vision processor unit on NASA’s Orion crew exploration vehicle. This capable system concept is well suited to processor-intensive missions like 3GIRS sensor OBP and the results of the preliminary study undertaken by SEAKR Engineering in Phase I of this SBIR have identified areas for improvement to meet the future goals of the program. The goals of phase II are to work toward upgrading the AIP to meet current and future 3GIRS requirements and thus improve the system’s commercialization success. Ultimately, the technology developed under this program will be integrated into the planned 3GIRS missions as well as other space-based sensor processing missions. BENEFIT: The 3GIRS-OBP will provide a single subsystem for payload processing, on-board memory storage, control, and power management. It is capable of hanlding several Gbit/sec of data and can process in real time.