SBIR/STTR Research Award

Novel Mitigation Techniques for Reconfigurable Computers for Space Based Applications

Award identifier 9567e207f68405d569ab8eea1592379866005dfbbe0b8d92537c71ad2fff5ad9Awarding agency Department of Defense · Air Force

Award amount

$935,728

Program and phase

SBIR · Phase II

Award year

2010

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Award details

Awarding agency
Department of Defense
Branch
Air Force
Recipient company
JACQUARD COMPUTING, INC.
Proposal award date
2009-09-30
Contract end date
2012-02-02
UEI
Not reported
Solicitation number
2008.1
Topic code
AF081-094

Research abstract

ROCCC 2.0 is a third generation C to HDL compiler tool that builds on the experience of ROCCC 1.0 and introduces modular designs. These allow the reuse of code across multiple platforms and can help achieve reliability from SEU through the use of well defined modular hardware components that implement computation operations as well as interfacing between FPGAs and from FPGAs to memory modules. BENEFIT: Improved productivity, performance and reliability of on-board space-borne reconfigurable computing systems.

Technology keywords

Not reported

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Agency intelligence

Department of Defense

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