RH Electronic Components (DSP's VC33 & C6727B)

Silicon Space Technology (SST) demonstrated during Phase I that astute modifications to a commercial CMOS process can yield significant improvement to Texas Instruments (TI) DSP circuits' radiation hardness. SST developed a practical approach for Harden By Isolation (HBI) integration into two existing TI DSP IC products (250nm VC33 and 180nm C2812). The resulting conclusion is that SST's HBI approach can be integrated via relatively minor changes to the circuit layout in combination with SST's process modules. This proposed program will use this methodology to produce radiation hardened versions of two DSP's--250nm VC33 and 130nm C6727. It is expected the resultant RH circuits will be hardened to a total ionizing dose level >300 Krad, a dose rate of 7e9 rad(Si)/sec, and be latch-up immune--all without the large cost in area, speed and resources required by incumbent "Harden By Design" (HBD) approaches. If successful, these products will demonstrate that families of TI products can be made available for space and military use through qualification of RH processes rather than individual HBD parts. A radiation-hardened process capability at Texas Instruments will enable a broad supply of radiation-hardened ASIC's, memories and standard products required for systems being developed for MDA.