Integrating Field Gate Programmable Arrays on Flexible, Thin, and Layered Substrates

If we could translate the benefits of 2-D integrated circuits into the third (vertical) dimension, it may be possible to extend Moore’s Law to the year 2060, creating dramatic new possibilities in missile and space systems. By tightly integrating a Field Gate Programmable Array (FPGA) with an often large population of peripheral components into a miniaturized 3D structure, the development and fabrication timeframe of the overall system will be reduced by concealing the complexity of the FPGA from system designers. Through miniaturization and reduced trace lengths resulting from 3D form, parasitic impedances will be reduced and consequently will improve the system by 1) reducing ground bounce and voltage droop in the FPGA’s power network, 2) reducing losses in high speed data buses, and 3) improving Electro-Static Discharge (ESD) performance of the overall system. By eliminating the complexity of the hundreds or thousands of peripheral components from the system designer, reconfigurable devices will be deployed in DoD and military applications with a dramatic reduction in both time and effort.