Reliable, High Temperature Silicon Carbide MOSFET

This SBIR Phase II program, in response to topic number A05-236, aims at design and fabrication of a novel SiC power MOSFET to address the problems of (i) low channel mobility, (iii) low and unstable threshold voltage, and (iii) low gate oxide reliability under both high electric field and high temperature. Based on the successful Phase I feasibility demonstration of the concept, a physics-based device model will be optimized to guide the experimental efforts and to predict the device performance including DC and switching characteristics as well as temperature dependence. LMOSFETs and MOS capacitors will be used to optimize gate thermal oxide process conditions and to evaluate gate oxide quality and channel carrier mobility, targeting a field-effect channel mobility of 200cm2/Vs. Multiple batches of SiC power MOSFETs and lateral MOSFETs will be designed and fabricated, targeting systematically increased MOSFET power capability, consistently decreased device specific resistance, reproducible and stable threshold voltage, and reliable gate oxide for applications up to 200oC. Fabricated power MOSFET wafers will be diced and packaged for half-bridge inverter testing and successful devices will be delivered for independent evaluations. Phase III will be focused on addressing any remaining issues and on improving the device yield for commercial introduction of prototype SiC power MOSFETs.