Blind Adaptive Signal Cancellation for Wide Dynamic Range A/D Converter

The very high-resolution V Corp analog-to-digital converter with Adaptive Signal Cancellation (ASC) uses a parallel array of high-speed, high-resolution analog-to-digital converters (ADCs) with blind adaptive interstage matching to successively cancel large signals from the analog input and thereby allow very wide dynamic range digitization of the remaining lower level signals. Conventional pipelined subranging ADC architectures without V Corp’s proprietary ASC signal processing suffer from transfer function discontinuities due to gain, phase, and DC-offset mismatches between the multiple ADCs. These discontinuities introduce nonlinear distortion that severely limits the usable Spurious Free Dynamic Range (SFDR). The ADCs must be matched extremely accurately to enable high-resolution performance, which is very difficult to accomplish because the mismatches are a function of input frequency, amplitude, sample rate, and even small temperature changes. The key to the efficacy of this Adaptive Signal Cancellation architecture is the ability for the processing to calibrate itself in the background to insure optimal dynamic range by cancelling large signals. The architecture (including multiple ADCs, DACs, support electronics and adaptive processing) can be implemented in a compact, low-power custom ASIC or a printed-circuit board with discrete components and an FPGA. Note that this architecture does not use digital post-processing to notch filter out large signals. The ADC architecture itself inherently cancels the large signals by using V Corp’s proprietary signal processing to assure interstage matching. During Phase I, V Corp will demonstrate the architecture with detailed simulations over a wide range of operating and environmental conditions. During Phase II, a real-time implementation of the A/D converter system will be implemented and tested.