SBIR/STTR Research Award

Commodity Auxiliary Processors for Enhanced Software Tamper Protection (CAPESTAR)

Award identifier 8a131966f0c1de3828bcc9b11b5e6bf04d8b556fb9704c7b9322ffd1b1887fc2Awarding agency Department of Defense · Air Force

Award amount

$99,638

Program and phase

SBIR · Phase I

Award year

2007

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Award details

Awarding agency
Department of Defense
Branch
Air Force
Recipient company
ARCHITECTURE TECHNOLOGY INC
Proposal award date
2007-01-30
Contract end date
2008-01-30
UEI
U2DYBLL85L56
Solicitation number
2006.3
Topic code
OSD06-I10

Research abstract

Software plays an ever-increasing role in modern weapons systems. The consequences of enemies capturing and reverse engineering the software in these systems pose a real risk for the DoD. Anti-tamper technologies protect these assets by increasing the costs associated with extraction of this information by enemy forces. “Out-of-band” protection measures (involving trusted hardware modules) are considered to be most effective, with “in-band” protection measures (implemented only in software) being considered less effective. Increasingly, COTS systems include special-purpose auxiliary processors, such as dedicated graphics processors. These auxiliary processors can substitute for proprietary trusted hardware modules in a hybrid approach to increase the effectiveness of anti-tamper protection. To enhance existing “in-band” protection measures, Architecture Technology Corporation will leverage its extensive experience in software Anti-Tamper technologies to design and build a novel, hybrid anti-tamper approach: Commodity Auxiliary Processors for Enhanced Software Tamper Protection (CAPESTAR). CAPESTAR will move anti-tamper functionality off the main CPU onto COTS auxiliary processors within the system, providing increased resistance to tampering and also “locking” the software to a particular hardware configuration. CAPESTAR will function automatically and will not require any specialized programming knowledge, expertise, or experience related to the specifics of the COTS auxiliary processors used.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

249 SBIR/STTR records share this UEI (1994–2025). Reported award amounts total $83,056,609. Reported amounts are not federal obligations.

Phases: Phase I, Phase II, Phase II – Direct to Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration, National Science Foundation, Department of Homeland Security, Department of Transportation, Department of Education

Agency intelligence

Department of Defense

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