SBIR/STTR Research Award

Fast Low Power ADC with Integrated Digital Data Processor

Award identifier b75d834ea231d3f3ba8fb5d912e420177fe81113e6e9ab6c9ddc0cbcfe5cf2c1Awarding agency National Aeronautics and Space Administration

Award amount

$69,999

Program and phase

SBIR · Phase I

Award year

2007

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Award details

Awarding agency
National Aeronautics and Space Administration
Branch
Not reported
Recipient company
Katsman, Vladimir
Proposal award date
2007-01-19
Contract end date
2007-07-23
UEI
WWU3HNAKK629
Solicitation number
Not reported
Topic code
S6.04

Research abstract

Innovative data measurement/acquisition systems are needed to support future Earth System Science measurements of the Earth's atmosphere and surface. An adequate system must employ a high-speed, extra low power, linear, analog-to-digital converter (ADC) with high input bandwidth and accuracy, followed by a digital signal processor that is usually implemented inside a field-programmable gate array (FPGA). Commercially available ADCs with input bandwidths larger than 1GHz feature high power consumption and latency, and poor linearity. With increasing ADC sampling rates, timing difficulties within the parallel interconnects between the ADC and the following FPGA become increasingly prominent. Therefore, a monolithic ADC incorporating a data converter that performs digital data demultiplexation and retiming is desired. To address these needs, the Advanced Science and Novel Technology Company proposes to develop a novel, extra low-power, extremely linear, under-sampling ADC featuring a high analog input bandwidth (>5GHz) that can easily interface to a following FPGA through a low-speed (<750Mb/s) parallel interface. To achieve this functionality, the proposed system-on-chip will utilize a proprietary sub-Nyquist front-end analog demultiplexer, a combinational ADC structure with proprietary gain-stabilization circuitry, and a digital signal processor implementing digital data demultiplexation and the company's proprietary data alignment scheme.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

36 SBIR/STTR records share this UEI (2003–2022). Reported award amounts total $11,404,811. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: National Aeronautics and Space Administration, Department of Defense, Department of Energy

Agency intelligence

National Aeronautics and Space Administration

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