Innovative Manufacturing Process Improvements

Miniaturizing electronic packaging is critical to the advancement of electronics design and capability. Smaller, denser packages are required to increase data processing capability of current systems. The objective of the research project is to continue development of increased signal processing capability for interceptor electronics while maintaining low junction temperatures for improved performance and reliability. In Phase I, a conceptual design was proposed for miniaturizing an existing massive parallel image processor that currently utilizes four FPGA’s to allow for a 400% increase in processing elements over current planar designs within the same physical envelope. This increase in CPU’s for processing focal plane array data enhances weapon system capability and reliability. Phase II will pursue a manufacturing and assembly redesign of the parallel processing array electronics assembly using STI’s Imbedded Component/Die Technology. The proposed method of stacking bare die interposer modules, thermally coupled to an inner thermal core or lid, provides passive cooling for true miniaturization with integrated thermal management. An engineered prototype shall be delivered as a proof of principle demonstration for future testing and integration into a missile defense system.