Radiation Hardened By Design Structure ASICs for Reliable Digital Components

Recent advances in radiation hardening by design (RHBD) techniques for deep sub-micron semiconductor technologies enable fabrication of rad hard microcircuits through commercial foundries. By applying these techniques to an emerging single-mask, via-programmable structured ASIC architecture, we propose to design and develop a family of rad hard base arrays suitable for single configuration reticle, multi-project wafer lots through the 130 nm CMOS technology at the IBM Trusted Foundry facility. Our RHBD layout techniques have demonstrated strategic levels of hardness to total ionizing dose, single event latchup, and prompt dose. Our RHBD circuit techniques have demonstrated strategic levels of hardness to single event upset and single event transient. Our via programmable gate array (VPGA) structured ASIC approach has demonstrated advantages over conventional standard cell based ASIC for reducing non-recurring engineering costs, shortening design cycles, shortening development schedules, and significantly reducing component costs.