Super Resolution Using Analog Spatial Processors

During Phase I Computational Sensors Corp. (CSC) will explore spatial domain super resolution (SR) approaches for extracting high resolution images from non-uniformly sampled data registered using sequences of low resolution images and seeker line-of-sight (LOS) direction estimates from an Inertial Measurement Unit (IMU). Interpolation, fundamental to SR, will be performed using the Gaussian blur kernel of our Thin Film Analog Image Processors (TAIP). In previous work, CSC has developed an analog, massively parallel, real-time video processing system capable of bulk spatio-temporal filtering. The enabling device uses analog silicon retinas in multi-chip architectures for complex, agile, spatial-frequency filtering. CSC plans to leverage the inherent computational advantage of performing large kernel spatial filtering in the analog domain to developing high frame-rate SR capability for mid-course seekers. One of the most difficult problems facing national missile defense pertains to accurately and efficiently identifying closely-spaced objects (CSO). For space-based detection systems, the situation can be highly complex with multiple objects moving at low relative velocities amid countermeasure clutter. Super resolution has the potential to enable earlier target/decoy discrimination for mid-course interceptors. During Phase I a SR approach will be developed with real-world data testing and implementation in hardware to commence in Phase II.