Multi-Sampling System with Tree Architecture for Pulse Shape Analysis

Shape analysis of pulses collected from arrays of fast particle detectors used in nuclear physics experiments requires data processing systems with fast (>500 Ms/s) sampling rates, in order to preserve the pulse shape information. Existing systems rely on multi-channel analog-to-digital converters with a single-in/single-out architecture, 8-12 bit accuracy, sampling rate below 250MS/s, low component density, and high power consumption. Improvements to the sampling rate and the input dynamic range is limited by the converter complexity, power consumption, and cost. This project will develop a novel multi-sampling system with a power-efficient, sub-Nyquist, shifted-phase, sampling tree architecture utilizing proprietary single-input/dual-output sample-and-hold amplifiers. The programmable system-on-chip also contains a signal preprocessor that performs a preliminary identification of the signal amplitude range, in order to detect the event occurrence and to extend the input dynamic range by means of the controlled signal attenuation. During Phase I, the preliminary system architecture was developed and the most critical blocks were designed and simulated. The feasibility of a novel, low-distortion sample-and-hold amplifier with a dual CMOS transmission gate was proven in computer simulations. Phase II will develop, fabricate, and test the programmable system-on-chip as an application-specific integrated circuit in SiGe BiCMOS technology. Commercial Applications and other Benefits as described by the awardee: In addition to the application for nuclear physics, the system-on-chip should find use in wireless ground stations, radar systems, software definable radio, medical diagnostic equipment, and measurement instrumentation.