ADC with Adaptive Parallel Combining for Improved SNR and SFDR

"This Small Business Innovation Research Phase I project demonstrates a very high-resolution Analog-to-Digital Converter with Adaptive Parallel Combining (called Stacked ADC) which uses a parallel stack of high-speed, high-resolution analog-to-digitalconverters (ADCs) with adaptive signal combining to dramatically improve resolution (both Signal-to-Noise Ratio (SNR) and Spurious Free Dynamic Range (SFDR) ) while maintaining very high sample rate (wide bandwidth). Proprietary adaptive processing isused to optimally combine the parallel ADC outputs to maximize the SNR and SFDR. Proprietary digital FIR filtering is used to insure the parallel array of ADCs are extremely well-matched in gain and phase; when the parallel ADC signals are combined,these gain and phase mismatches would otherwise introduce errors in the ADC that significantly limit the dynamic range of the system. The Stacked ADC architecture will always exceed state-of-the-art because it can easily be upgraded as new, more powerfulADC products become available. For example, this technology is currently capable of using four 12-bit, 210 MHz sample rate ADCs in parallel to improve the SNR and SFDR by 26 dB over a wide range of input power levels and while maintaining the full 210 MHzsample rate. A stack of parallel ADCs and the efficient digital signal processing can be packaged in a compact, low-power multi-chip module (MCM) for use in the next generation of high-perform