Hardware in the Loop Operational Testing for Analog VLSI Image Processor Design

During Phase I, Computational Sensors Corporation (CSC) designed and manufactured the components of a first-generation analog image processing system. This system is capable of fast, bulk, spatio-temporal filtering of infrared sensor data and using thefiltered data to compute localized estimates of motion. Both general spatio-temporal filtering and localized motion estimates are useful for detection and discrimination in missile defense applications. In Phase II, CSC proposes to manufacture an updatedsystem. This system will be installed in a hardware-in-the-loop (HWIL) test bed at the Air Force Research Laboratory (AFRL) kinetic kill vehicle HWIL simulation (KHILS) facility. The system performance will be analyzed using representative missile defenseintercept scenarios, with an emphasis on target detection, tracking, and discrimination.