High-Performance, CMOS Solid-State Photomultiplier

The present CMOS SSPMs use a large feature size process to maximum the silicon die area for a low-cost solution, but this low-cost solution limits the performance of the SSPM, as well as the amount of on-chip circuitry that can be incorporated into the device. Existing SSPMs provide may provide a specific characteristic (e.g. low dark current) but may fail in providing another characteristic (e.g. linear dynamic range). Not one commercially available SSPM satisfies all criteria for a high-performance photodetector. As integrated electronics exploit small feature sizes to provide improved solid-state technologies, this project will demonstrate and commercialize a high-performance solid-state photomultiplier, using a CMOS process with smaller feature size to improve noise terms and allow for integrated, high-speed electronics. Commercial Applications and Other Benefits: These devices can be used in all physics experiments, such as CMOS, as upgrades or apart of the original design. The device will be highly valuable for optical readout of detectors in fields that at least span across medicine to military to science. The fabrication of the device in a standard CMOS process allows us to rapidly develop application-specific detector on a single chip. A variety of applications include scintillator based dosimeters, imaging for flow cytometry, hyperspectral imaging of pollution from satellites, PET and SPECT imaging, to name a few