A Low-Power, Dynamically Reconfigurable Scalable Array Processor (DRSAP) for Software-Defined Universal Terminals with Integrated RF
Award amount
$1,248,562Program and phase
SBIR · Phase II – Direct to Phase IIAward year
2025Award details
- Awarding agency
- Department of Defense
- Branch
- Air Force
- Recipient company
- XCELERIUM INC
- Proposal award date
- 2025-05-23
- Contract end date
- 2026-05-26
- UEI
- SHZHYRGBJU85
- Solicitation number
- X25.5
- Topic code
- AFX255-DPCSO1
Research abstract
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
- Dynamically Reconfigurable Scalable Array Processor (DRSAP)
- Dynamically Reconfigurable Scalable Array Processor forLow Power and High Performance DSP and AI/ML Processing In-Space
Awards with the same topic code
Verified by an exact topic code match. This is not a text-similarity match.
- Spoofer Targeting via Disparate Ubiquitous Sensor Telemetry (STARDUST) for Supporting Counteroffensives Against Adversarial Signal Manipulation
- Adaptive AutoVerse Digital Twin for Accelerating Depot Operations through Virtual Testing
- Celeste VR: Immersive VR Application for Advanced Warfighter Readiness
- Applying Automated Inline Inspection to Large Scale Braided Composite Preforms for High-Rate Production of Critical Components for Military and Commercial Aircraft
- Dormitory Readiness Tool (DRT)
Research funding history
3 SBIR/STTR records share this UEI (2023–2025). Reported award amounts total $2,648,470. Reported amounts are not federal obligations.
Phases: Phase II – Direct to Phase II, Phase I
Agencies: Department of Defense, National Aeronautics and Space Administration