Readout SerDes System for Number-Mode Photon Counting Arrays Operating at 4K

The value of the electric dipole moment of the neutron (nEDM) represents a test of the theories that describe the origin and evolution of the universe. Photomultiplier tubes (PMT) with 50mm diameter used as detectors for the nEDM experiment have two recognized limitations: low quantum efficiency and degraded performance due to secondary pulses.A solid-state Visible Light Photon Counter (VLPC) invented by DRS and proposed as a PMT replacement provides more than 4 times higher quantum efficiency. A multi-pixel VLPC sensor operates at the temperatures around 4K and requires custom in-pixel readout electronics with a serialized output in order to minimize the number of interconnects running into the cryogenic chamber. To address those needs, we propose to develop a silicon-germanium readout system with a proprietary low-complexity and high-speed multi-level serial interface capable to operate at temperatures below 4K. The system will include multiple in-pixel readout chips and one serializer chips attached to the back side of VLPC array by means of indium bumps. The serializer chip will communicate with an external deserializer chip that delivers the final binary data to a standard field-programmable gate array (FPGA). During Phase I, our company will develop the architecture and operational timing diagram of the proposed readout system, and design initial schematics of all critical blocks in the selected technology. A fully functional prototype of the complete readout system will be fabricated during Phase II. Commercial Applications and Other Benefits The technical advantages of the new readout electronics will include an improved functionality, high power efficiency, and a minimized number of interconnect to the circuits inside the cooled chamber. All those parameters are critical for the practical realization of VLPC sensor arrays with high quantum efficiency required for the nEDM investigations.