MICRO POWER VLSI CELL LIBRARY

WE PROPOSE TO DEVELOP A PARAMETERIZED CMOS CELL LIBRARY SPECIFICALLY FOR MICRO-POWER CIRCUITS. DURING PHASE I WE WILL CREATE THE LIBRARY GENERATION SOFTWARE, GENERATE A TYPICAL CELL SET, INCORPORATE THE CELLS INTO A TEST CHIP, HAVE THE TEST CHIP FABRICATED BY MOSIS, TEST THE CHIP, AND DOCUMENT THE LIBRARY. OUR EXPERIENCE DESIGNING THE SCMOSLIB MOSIS COMPATIBLE STANDARD CELL LIBRARY ALLOWS US TO PROPOSE AN ADVANCED PHASE I PROGRAM. DURING PHASE II WE WILL INTEGRATE THE LIBRARY GENERATOR WITH COMMERCIAL CAE SYSTEMS. WE WILL ADDRESS THE RELATIONSHIP BETWEEN THE GLOBAL SPEED AND POWER GOALS AND THE CHOICES OF PARAMETERS FOR SPECIFIC CELLS. WE ANTICIPATE A SUITE OF TOOLS THAT INCLUDE BOTH GOAL-DIRECTED SYNTHESIS OF CELLS AND ANALYSIS OF POWER CONSUMPTION. WE WILL ADD THE LIBRARIES AND SOFTWARE RESULTING FROM THIS EFFORT TO OUR SUITE OF LOW-COST CAE PRODUCTS ALREADY IN USE BY A MAJOR PORTION OF THE MOSIS COMMUNITY. THUS, MANY DESIGNERS WILL REAP IMMEDIATE BENEFIT FROM THIS R&D.