Modeling, Optimization, and Monitoring of Thick SiC Epitaxy Processes Open Topic

Texas Research Institute Austin will explore all potential access points on a SiC reactor selected by DMEA to set up a spectroscopic feflectance system for in-situ thickness measurements. This can impact semiconductor manufacturing due to processes drifting over time, requiring corrections by experience process engineers. Process engineers have developed methods such as Statistical Process Control, Run-to-Run controls, and Fault Detection and Classification to help maintain control, improve yields, and reduce wafer scrap. With the rise of Machine Learning (ML) and Artificial Intelligence (AI), automating these processes has become easier, reducing the need for constant engineering intervention. By combining the expertise of process engineers with ML, large sets of data inputs—such as process controls, equipment consumable lifetimes, and routine maintenance—can be integrated with process output parameters like wafer thickness, uniformity, defects, and electrical testing. This data-driven approach enables the development of models that can monitor and predict process drift or determine optimal times for consumable changes. The result is longer equipment uptime and improved yields, such as the thick silicon carbide epitaxy process or any CVD process that could benefit from in-situ measurements for AI/ML process control.