Low-Energy Architectural, Circuit, and Signaling Techniques for General Purpose Scalable Computing

Asynchronous circuits offer the potential for significant power savings over traditional clocked logic. We propose to develop an electronic design, synthesis, and management tool targeted at low-power, asynchronous circuit design. We will Deliver a functional prototype tool during Phase I. The Phase II tool will support VHDL as a hardware description for high-level language input, technology mapping, automated layout synthesis, and limited built-in test support using boundary-scan and full-scan techniques. The tool will be tightly integrated into our existing low-cost component-level integrated circuit design and synthesis tools. The tool will support industry standard CAD formats, and frameworks (e.g., CFI) where appropriate. A novel self-timed synthesis methodology will be used, permitting fully statis circuits that have been shown to operate robustly with power supply voltages less than 1V. In conjunction with the inherent power advantages of asynchronous circuits, this power supply flexibility permits a wide tradeoff of operating speed vs. power consumption, in the field. During Phase I we will develop the asynchronous circuit synthesis software. We will also implement and deliver a prototype design tool, and fabricate a test IC designed with the tool. The Phase I design and prototype prepares for Phase II implementation of the complete system. Anticipated Benefits: Low-power asynchronous circuits are ideal for battery-driven notebook computers and personal digital assistants (PDAs). This is one ofthe tastest-growting IC application areas, with direct commercial application in mobile communications and portable computers. Powerful design tools are essential to the development of these ICs. We intend to directly market tools developed under this research effort.