New Staring IR Architectural Readout Approach for Image Processing

"Low power real-time processing of large area image sensor data is not computationally feasible using existing digital technology. A practical solution to this computational bottleneck centers on the use of neuromorphic array based, low power analog visionprocessing systems.Computational Sensors Corporation (CSC) proposes to develop core enabling technologies for the development of a new massively parallel 3-D structure of highly integrated, multi-layered, programmable analog VLSI image processing layers that will supportnavigation and guidance requirements in mobile platform applications. This development will enable the first new architectural approach to the readout of staring focal plane sensors since their invention in the early 1970's - continuous parallel processingwithout synchronous multiplexer operations.Specifically, we propose to develop modular, wide dynamic range analog filter array layers for incorporation into multi-layered architectures using state-of-the-art micro-via vertical interconnect technology to seamlessly link unit cells of adjacentlayers. Our design concept extends our previous work using Thin Film Analog Image Processors (TAIP) and CMOS analog image processors for spatio-temporal motion detection to image processing layers having continuous, non-multiplexed, computationalcapabilities. This architecture also allows direct (no storage well) sampling of IR sensor irradiance and enables full utilization of the sensor spectral dynamic range for improved signal to noise performance and alias free operation as in biologicalsystems. Commercial, integrated, analog image processors are ideally suited for compact, low power, military imaging applications. Analog image processing technology may also be applicable in many other commercial areas including navigation and guidance markets aswell as automatic inspection, biometric identification, security, surveillance and machine vision applications."