SBIR/STTR Research Award

High-Speed, High-Resolution Advanced Filter Bank Analog and Digital Converter

Award identifier d3ed03573a7d41a43a26b86c5598eed412ed8612e43a1da468d7533d03e97ddcAwarding agency Department of Defense · Air Force

Award amount

$99,879

Program and phase

SBIR · Phase I

Award year

2001

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Award details

Awarding agency
Department of Defense
Branch
Air Force
Recipient company
V CORP. TECHNOLOGIES, INC.
Proposal award date
Not reported
Contract end date
Not reported
UEI
HLEJMS3GMGT9
Solicitation number
Not reported
Topic code
Not reported

Research abstract

This Small Business Innovation Research Phase I project demonstrates a breakthrough approach to very high-speed, high-resolution analog-to-digital conversion or digital-to-analog conversion which improves the speed of conversion by up to six times thestate-of-the-art by using a parallel array of individual converters. The V-Corp Advanced Filter Bank Analog and Digital Converter (AFB ADC) architecture works because the filter bank signal processing significantly reduces the sensitivity to analogmismatches (e.g., phase distortion, clock skew, temperature drift) which prohibit existing parallel conversion methods (e.g., Time-Interleaving) from achieving high resolution. V-Corp has proven the technical efficacy of the concept by successfullybuilding prototype analog-to-digital converter hardware with 12-bit resolution and 260 MHz sample rate (over twice as fast as state-of-the-art) and prototype digital-to-analog converter hardware with 14-bit resolution and 240 MHz sample rate (twicestate-of-the-art). Very importantly, the AFB ADC architecture will never become obsolete and will always exceed the state-of-the-art because it can easily be upgraded as new, more powerful ADC products become available. The architecture is amenable tosingle-chip integration for compact, low-power applications. The AFB ADC technology enables an advanced all-digital shipboard array with multiple beams and a single aperture, steerable nulls to mitigate co-site interference and jammers, fast beam pointingand target acquisition, software reconfigurability, and affordability due to high levels of circuit integration.During Phase I, V-Corp will demonstrate the architecture with the very latest analog-to-digital or digital-to-analog converters, demonstrate an efficient auto-calibration section in hardware, and utilize proprietary linearity error compensation routines toimprove the dynamic range of the system. A realtime hardware implementation of the digital signal processing in the AFB architecture will be implemented in a Phase I Option. During Phase II, a compact realtime implementation of the AFB ADC system(including the auto-calibration section) will be implemented and integrated in a target system (e.g., radar, GPS receiver, communications system according to the sponsor's requirements).The AFB ADC approach overcomes the critical A/D conversion bottleneckwhich limits performance of state-of-the-art radio frequency transceiver systems. Virtually any high-performance modern electronic system will benefit from the AFB ADC. Significant applications include enhancement of radar systems, wideband universal RFtransceivers, specialized test equipment, and medical imaging systems.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Research funding history

21 SBIR/STTR records share this UEI (1999–2011). Reported award amounts total $8,251,558. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense

Agency intelligence

Department of Defense

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