Radiation-Hardened Field-Programmable Gate Arrays

Field-programmable gate arrays offer significant cost savings, and faster design cycles, than conventional space-qualified electronic designs. We propose to develop a rad-hard FPGA integrated circuit, and EDA tools to program it. Phase I will deliver a prototype integrated circuit. During Phase II, we will design and manufacture a fullscale FPGA, and deliver a state-of-the-art design environment (supporting VHDL as a hardware description language). In the Phase I effort, we will design an enhanced FPGA architecture that supports operation in a hostile radiation environment. This architecture includes built-in self-test and real-time performance monitoring capabilities. Radiation-induced latch-up detection and recovery circuits will also be included. By implementing a general purpose IC with a commercial CMOS fabrication process. The development system will provide logic synthesis capability, and will be tightly integrated into our existing low-cost commercial EDA tools. We will support industry standard CAD formats, and frameworks (e.g., CFI) where appropriate. During Phase I we will develop the FPGA architecture, in conjunction with place-and-route software to program it. We will also design and fabricate a test FPGA IC.