Passive High-Q Harmonic Rejecting Filter Based Receiver Architecture for Agile Interferer Rejection

In response to DoD solicitation N241-059 on Wideband Interference Suppression, Alphacore will develop a comprehensive solution, harnessing capabilities of multiple fast-tuning notch filters employing fully integrated circuit (IC) CMOS passive switched capacitor (SC) N-path sampling mixer networks. These filters are designed to operate independently, facilitating adjustable center frequencies & harmonic rejection capabilities to effectively mitigate a spectrum of interference challenges. Leveraging advancements in state-of-the-art deep submicron CMOS processes, our IC solution promises high-speed performance & low power consumption by using passive SC networks. Proposal defines a mechanism for precise control over filters' bandwidth, center frequency & depth, ensuring optimal adaptability to varying environmental conditions using passive SC, frequency translated N-path Finite Impulse Response (FIR) filters. Emphasizing necessity for real-time responsiveness, our solution guarantees a swift suppression of interfering signals, with a time-to-suppression requirement of less than a microsecond, ideally achieving sub-nanosecond response times by a fast & agile clock generation & clock gating scheme to start switched capacitor FIR response. Critical to functionality of our proposed system is minimal impact on signal transmission quality. Moreover, we prioritize selection of technologies that minimize device insertion loss, ensuring seamless integration within existing systems. Our innovation in notch filtering mechanisms, with preservation of signal fidelity, with latency, design complexity, Size, Weight, & Power considerations, forms our approach in scenarios with high instantaneous bandwidth & limited antenna availability. Proposal will achieve demonstration of multi-notch filtering system targeting 3 to 6 GHz communications band that is capable of handling more than two interferers of varying bandwidths, including spread spectrum noise-like signals, alongside both narrow & wideband desired signals spread across proposed input Instantaneous Bandwidth.  Alphacore will focus on refining system design & conducting thorough transistor & behavioral simulations with various signals of interest & interferers to ensure robustness & efficacy. The proposal outlines a pathway towards development & optimization of a multi-notch filtering system using switched-capacitor N-path filtering approaches, using deep sub-micron CMOS technology, such as 65nm process node, capable of addressing complexities inherent in modern communication environments. The proposed technical objectives include:  •    Develop an innovative, low-power, CMOS passive switched capacitor N-path notch with 10 programmable notch frequencies,  •    Develop system & circuit level implementation of a passive 8-path programmable notch filter on 65nm CMOS process, •    Design appropriate active & passive building blocks for programmable frequency generation for 10 independent notch filters.