SBIR/STTR Research Award

Integrated Complementary Metal Oxide Semiconductor Nuclear Event Detector for System on a Chip Applications

Award identifier 7e0f1a403f5aa6b047a64da6cb5242113fabdec8e66bd8078a8ed84c1303e41cAwarding agency Department of Defense · Navy

Award amount

$239,751

Program and phase

SBIR · Phase I

Award year

2022

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Award details

Awarding agency
Department of Defense
Branch
Navy
Recipient company
Alphacore, Inc.
Proposal award date
2022-07-11
Contract end date
2023-10-02
UEI
CXMPDDLFBCH3
Solicitation number
22.1
Topic code
N221-082

Research abstract

In response to the US Department of Navy Phase 1 SBIR solicitation, N221-082: Integrated Complementary Metal Oxide Semiconductor Nuclear Event Detector for System on a Chip Applications, Alphacore, in partnership with Dr. Hugh Barnaby at Arizona State University (ASU) will develop the techniques and circuitry needed to deploy a fully integrated Complementary Metal Oxide Semiconductor (CMOS) Nuclear Event Detector (NED). The proposed NED concept will be designed to be deployable into any CMOS Silicon on Oxide or bulk process at a DMEA trusted commercial CMOS foundry without requiring modifications to the existing baseline CMOS process flows, as well as adhering to existing CMOS foundry process design rules.   Ionizing gamma ? radiation from a nuclear event generates excess electron-hole pairs within the CMOS silicon, resulting in transient leakage currents, commonly called photocurrents, that appear across reverse-biased CMOS p-n junctions. These high level, transient photocurrents can both disrupt CMOS circuits functionality (upset) as well as cause permanent damage (burnout). NEDs are used in strategic systems to detect when a preset rate of prompt dose is deposited on the detector, and alert the system to power down vulnerable subsystems, store critical data in non-volatile memory, and begin planning to restart its most vulnerable subsystems when it is safe to do so once the nuclear event has passed. This allows electronic components to be protected from effects of prompt ionizing radiation and large current surges, mitigating the effects of nuclear weapon output.   However, traditional non-integrated discrete technology based NEDs are expensive and unwieldly, and the technology can be improved and can be more affordable if incorporated into a CMOS ASIC. Alphacore, in partnership with ASU, will design a fully integrated CMOS NED to modernize currently available discrete component-based NED technology. The proposed integrated CMOS NED will support and enhance the United States’ capacity to respond effectively to and recover from limited nuclear attacks and incidents. Alphacore’s CMOS NED design will boost the United States’ capability to protect critical data, infrastructure, and property - including space assets, and enhance America’s preparedness to withstand the effects of nuclear events.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

155 SBIR/STTR records share this UEI (2013–2026). Reported award amounts total $63,784,604. Reported amounts are not federal obligations.

Phases: Phase I, Phase II, Phase II – Direct to Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration, Department of Energy, Department of Commerce

Agency intelligence

Department of Defense

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