SBIR/STTR Research Award
EdgeNF CPU - 28-nm, rad hard, 1.7-GHz CPU
Award amount
$149,884Program and phase
SBIR · Phase IAward year
2022Award details
- Awarding agency
- Department of Defense
- Branch
- Missile Defense Agency
- Recipient company
- GOOFYFOOT LABS LLC
- Proposal award date
- 2021-12-06
- Contract end date
- 2022-06-05
- UEI
- MTPCSNM9NV96
- Solicitation number
- 21.2
- Topic code
- MDA21-022
Research abstract
GoofyFoot Labs proposes the Edge-Of-Next-Flight (EdgeNF) CPU, a dual-core ARM Cortex A-53 computer processing unit (CPU) designed on a 28-nm Fully Depleted Silicon on Insulator (FDSOI) process running at 1.8 GHz combined with an in-package, rad hard integrity overwatch module with novel hardware accelerated checkpoint-and-recovery capabilities implemented on a FPGA designed on a rad-resilient technology node. EdgeNF can tolerate an aggregate total ionizing dose (TID) of 500 krad, is immune to single-event latchup (SEL) at linear energy transfer (LET) levels, and is projected to exhibit a single-event upset (SEU) rate. Approved for Public Release | 21-MDA-11013 (19 Nov 21)
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
- Extreme Environment, Rad Hard, High Performance, Low Power FPGA for Space Applications
- High Performance/Throughput, Low Latency and Low Power Field Programmable Gate Array (FPGA) for Software Defined Radio (SDR) and Cognitive Radio (CR)
- High Performance/Throughput, Low Latency and Low Power Field Programmable Gate Array (FPGA) for Software Defined Radio (SDR) and Cognitive Radio (CR)
- Design and Fabrication Techniques for 3-Dimensional Integrated Circuits
- Design and Fabrication Techniques for 3-Dimensional Integrated Circuits
Awards with the same topic code
Verified by an exact topic code match. This is not a text-similarity match.
- Radiation Mitigated State of the Art Field Programmable Gate Array (FPGA)
- Heterogeneous computing system with dynamic fault tolerance to radiation hardened commercial microelectronics (Hetero-Hard)
- Radiation Mitigated State of the Art Field Programmable Gate Array (FPGA)
- Error Detection and Latch-up Prevention in Radiation Hardened Logic Units
- Radiation Hardening of Non-Hardened Commercial Microelectronics
Research funding history
6 SBIR/STTR records share this UEI (2009–2022). Reported award amounts total $2,222,927. Reported amounts are not federal obligations.
Phases: Phase I, Phase II
Agencies: Department of Defense, National Aeronautics and Space Administration