Digital Readout Integrated Circuits With Efficient, Low Power On-chip Data Compression Development

High data rate digital focal plan arrays offer the warfighter improved situational awareness and target detection and discrimination. However, these benefits are difficult to realize because of high output data rates, high power dissipation, demanding cooling requirements, and limitations on data rates. The proposed 10:1, lossless, on-chip compression, cuts the data rate by an order of magnitude, and by doing so removes the key barriers from the implementation of much needed high performance sensors.Nu-Treks on-chip compression scheme is based on widely used image coding and compression schemes adapted to the specific data flow in digital readout integrated circuits (DROICs). It will also be optimized for typical Degraded Visual Environments (DVE) and Hostile Fire Indicator (HFI) images and war fighter objectives. The compression scheme selected is especially suitable for on-chip implementation as it operates on a single row at a time and involves only addition, subtraction, and bit shifting (multiplication and division by 2), which are easy to implement on chip.Nu-Trek will leverage cutting edge in-house DVE and HFI DROICs to customize and optimize the compression scheme, implement the compression scheme in CMOS, and demonstrate the compression scheme in conjunction with high data rate DROICs.