A Rapid and Cost-Effective Approach to Nanostructural Analysis of Semiconductor Devices

Phase I proposal focuses on the demonstration of the feasibility to improve the efficiency and to lower the cost associated with nanostructural analysis of semiconductor devices by implementing a two-pronged strategy. The proposed methodology combines streamlining the required specimen preparation processes with application of test structures for the above purpose. This strategy will minimize the required time and effort for sampling a semiconductor device, which in turn will lower the overall related cost and turnaround time. In Phase II, we plan to develop and prototype a specimen preparation subsystem and design and fabricate a variety of test structures based on the exploratory development effort that we conduct in Phase I. BENEFIT: The availability of a “better, faster, and cheaper” nanostructural analysis option through an improved instrumentation and methodology will have an immediate impact on the extent of its use in the semiconductor industry, which in turn could lead to an accelerated development and introduction of higher quality semiconductor-based device products to the market at a lower cost.