A Rapid and Cost-Effective Approach to Nanostructural Analysis of Semiconductor Devices

An expedited and economical nanostructural sampling and analysis of semiconductor devices will be crucial to accelerated product development and rapid introduction of these technologies to the market with a higher quality at a lower cost. The proposed effort aims to carry out the next phase of development activities, geared toward realization of the above objective. We successfully demonstrated the feasibility of improving the related sampling efficiencies during Phase I. The proof of concept was presented for US Patent 6,188,068, in which the associated specimen preparation methodology could readily substitute the state of the art. Additionally, the ability to improve the sampling effectiveness via application of test structures was further developed and documented. The continuation of these efforts toward development of related prototypes is planned in Phase II. Extra emphasis will be placed on applications involving manufacturing yield analysis and lifetime assessment as well as other key process and product characterization requirements. BENEFIT: The semiconductor device technology in general, and the boutique-type technologies with high-value, low-volume, mission-critical defense and intelligence applications in particular, will benefit significantly from this rapid and cost effective nanostructural analysis approach. The improved quality and accelerated time-to-market for the successive generations of these technologies will have far-reaching commercial advantages for the government and the private sector.