SBIR Phase II: Low-Cost Packaging Solution for Space-Grade and High-Reliability Integrated Circuits
Award amount
$999,561Program and phase
SBIR · Phase IIAward year
2024Award details
- Awarding agency
- National Science Foundation
- Branch
- Not reported
- Recipient company
- APOGEE SEMICONDUCTOR, INC.
- Proposal award date
- 2023-12-01
- Contract end date
- 2025-11-30
- UEI
- SQ3NLYSGDAW7
- Solicitation number
- NSF 22-552
- Topic code
- SP
Research abstract
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
- Radiation Hardened Integrated Circuit Fabrication Process Design Kit for Advanced Cryogenic Imagers
- STTR Phase I:Low-Cost Packaging Solution for Space-Grade and High-Reliability Integrated Circuits
- A Modular, High-Efficiency, Radiation-Hardened, DC-DC Converter with Decentralized Control
- A Modular, High-Efficiency, Radiation-Hardened, DC-DC Converter with Decentralized Control
- Cryogenic Radiation-Hard Read-out Integrated Circuit Electronics Process Design Kit
Research funding history
12 SBIR/STTR records share this UEI (2014–2024). Reported award amounts total $6,475,305. Reported amounts are not federal obligations.
Phases: Phase I, Phase II, Phase II – Direct to Phase II
Agencies: Department of Defense, National Science Foundation, National Aeronautics and Space Administration, Department of Energy