STTR Phase I:Low-Cost Packaging Solution for Space-Grade and High-Reliability Integrated Circuits

The broader impact/commercial potential of this Small Business Technology Transfer Research (STTR) Phase I project seeks to enable cost effective, compact, and higher performing integrated circuits for space applications. Space electronics have lagged the commercial state-of-the-art by over a decade.The lack of high performing, cost effective packaging solutions further increases this gap. Traditionally, space applications utilize large, expensive, and low-performing ceramic packages that limit adoption of radiation-hardened semiconductors into the “New Space” applications such as Low Earth Orbit (LEO) mega-constellations for worldwide internet. “New Space” companies that design and manufacture electronics for satellites are the primary target customers while non-radiation-hardened applications that behave in extreme thermal environments, such as aviation and “down borehole" electronics for the oil/gas drilling, are also a target market for the technology.This Small Business Technology Transfer Research (STTR) Phase I project seeks to prove the feasibility of the innovation to effectively address the reliability challenges in interconnect (IC) packages operating over the extended temperature ranges required in space applications. There are multiple unknowns and technical challenges to be explored, requiring extensive interdisciplinary research and development. The goal is to arrive at a solution that effectively alleviates the mechanical stresses caused by the thermal expansion, while having acceptable thermal and electrical performance, particularly in high-power ICs, such as power converters/regulators. The research will determine the level of stress applied by the structure to the underlying silicon and the level of stress that is permitted before damage to the underlying silicon die will occur.The project will also assess the reliability/risks associated with the temperature cycling and evaluate materials that are best suited to address the technical needs, while also offering a cost-effective manufacturable solution.The team will investigate the suitability of existing commercial fabrication processes and how modifications in them may impact their manufacturability.They will also investigate possible geometry enhancements to reduce buckling, explore the stress-alleviation versus thermal resistance tradeoffs in various geometries and compositions of structures, and create models that support design guidelines for optimal placement of sensitive circuits on the die.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.