Phase-Locked Loop IP block for Intel 16 CMOS Mixed Signal circuit library capability for application in highly SWAP-constrained space ISR platforms

Alphacore will provide a critically needed low-jitter, multi-purpose, frequency tunable phased locked loop (PLL), hardened to both natural and man-made radiation effects. The IP will be developed in an advanced USA-based FinFET CMOS process. The versatile PLL covers a large frequency tuning range from 3GHz to 10GHz, and the low-jitter performance is a key factor in making this PLL particularly useful across a wide range of applications. High-performance data converters used in all modern RF transceivers require PLL-generated sampling clocks with jitter requirements far beyond the reach of existing radiation-hardened circuitry. Alphacore’s PLL provides two essential benefits to the U.S. Space Force (USSF) and the rest of the Department of Defense, as well as to the radiation-hardened electronic community at-large: 1) with its low-jitter performance, it enables modern wide-bandwidth architectures for radiation-hard applications, similar to ones used in commercial 5G applications, as an example. 2 it complements and fills a critical gap in a rad-hard mixed-signal library for the Intel 16 fabrication process (which is a mix of 12nm and 22nm FinFET technology) that was recently funded by the DoD in support of creating a secure and trusted source of state-of-the-art microelectronics technology.