An Application-Specific DTDSM ADC Using State-of-The-Art Circuit Techniques for Magnetic and Electropotential Sensors

Inertialwave Inc (IW) proposes to use state-of-the-art circuit designs such as ring amplifiers and pseudo-pseudo-differential (PPD) sampling to produce a Delta-Sigma ADC with a noise floor of -160dB and bandwidth of 5-20kHz.Ý Delta Sigma Modulator (DSM) ADCs are regarded as the best choice for low frequency, high resolution applications.Ý Discrete-Time DSMs (DTDSM) allow for reconfigurability and diverse circuit architectures, since they are not limited to using linear amplifiers like continuous-time DSMs. ÝIn addition to these general techniques, InertialWave will maximize ADC ENOB using the characteristics of specific sensors (to be provided by the Navy).ÝSome potential techniques evaluate applicability of using a Band-Pass DSM (BPDSM) architecture or digital reconfiguration for targeting multiple sensors. ÝCMOS amplifiers have flicker noise that often dominates under 10 KHz. ÝCorrelated Double Sampling (CDS), which switches Positive/Negative system inputs between Positive/Negative differential amplifier inputs each cycle can attenuate correlated noise sources such as flicker noise by input sampling twice in rapid succession. ÝOthers have demonstrated a 20dB reduction in noise floor through incorporation of CDS. ÝPPD sampling is similar to CDS but uses a single-ended amplifier instead of fully differential, thereby improving SNR while lowering power. ÝBPDSM is not the only possible approach. ÝIf the requested sensors are wideband devices, Ýdigitally configurable clocking can be used with a Low-Pass Delta Sigma Modulator (LPDSM) to match bandwidth to the specific sensor.Ý To avoid increased power, the amplifier bias currents may also be digitally selected.Together these circuit, architecture, and digital processing techniques can be combined with sensor characteristics to create an ADC with high dynamic range and extremely low noise.