SBIR/STTR Research Award

High-precision Low-SWAP Robust Autonomy & Navigation

Award identifier 9e0c957ad8958a6f5929c569330b983c0725af8dff3dbbc542f04b813094c3eaAwarding agency Department of Defense · Air Force

Award amount

$1,000,484

Program and phase

SBIR · Phase II – Direct to Phase II

Award year

2024

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Award details

Awarding agency
Department of Defense
Branch
Air Force
Recipient company
Tycho AI Inc.
Proposal award date
2024-06-27
Contract end date
2025-06-27
UEI
MXYQQ2P7LGS5
Solicitation number
X24.4
Topic code
AFX244-DPCSO1

Research abstract

Existing and emerging autonomous vehicle systems rely extensively on external aids like the Global Positioning System (GPS) and radio communications. We envision truly autonomous capabilities that utilize on-board sensing and computing capabilities for navigation, autonomy and artificial intelligence tasks. Towards this end, we propose to develop new hardware and software platforms that provide substantially more computing power for visual navigation, autonomy and artificial intelligence at the edge. We propose to develop new algorithms and software for robust visual-inertial navigation that will allow small vehicles to navigate in challenging environments including dust, dirt, large water surfaces, reflective surfaces, moving objects like leaves blown by wind, among many others. We also propose to develop new computing hardware, algorithms and software for high-resolution and high-frame-rate navigation and autonomy, so that the resulting systems achieve operational speeds, e.g., 30 mph in indoor environments and 120 mph in outdoor environments while traveling at 10 feet altitude.á á The key approach is to tightly integrate sensing hardware, computing hardware, algorithms and software together, while we design and build them from the ground up. This tight integration delivers performance that is far beyond what is available when software is designed for and deployed on off-the-shelf computers and sensors. The tight integration entails that we develop custom computing hardware, e.g., efficient circuit boards and effective circuitry that is implemented on Field Programmable Gate Arrays (FPGAs). á

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

3 SBIR/STTR records share this UEI (2024–2025). Reported award amounts total $1,378,870. Reported amounts are not federal obligations.

Phases: Phase I, Phase II – Direct to Phase II

Agencies: Department of Defense

Agency intelligence

Department of Defense

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